The Commonest Mistakes Engineers Tend to Make in PCB Design

Engineering mistakes can never be avoided. Don't be silly to believe that those mistakes stand for low level or void of excellence in PCB design capability. However, most of mistakes engineers tend to make derive from their excessive considerations in terms of system efficiency, signal integrity, low energy consumption and cost saving. Put another way, those mistakes result from "kindness". Therefore, awareness about the "kindness" and timely avoidance of those mistakes is greatly beneficial for the smooth implementation of your projects.

System Efficiency

Mistake 1: Random change of CPU

Some engineers observe that CPU with a basic frequency of 100M has processing capacity of just 70% and they would like to change it with a 200M. In fact, the processing capacity of system involves all kinds of elements and in the field of communication, difficulty always occurs on memory, which means that in spite of high speed of CPU, it's still a waste of efforts with external visit with a low speed.

Mistake 2: Larger cache leads to higher speed of system.

The improvement of cache doesn't necessarily lead to high performance of system and sometimes shutdown of cache leads to higher speed of system than application of it because data that is moved into cache has to obtain multiple applications unless system efficiency will be increased. Therefore, generally only command cache is opened while data cache is only limited in partial storage space even if it is opened.

Mistake 3: Believing interruption is faster than query.

Interruption has strong instantaneity but it isn't necessarily fast. If there are too many interruption missions, system will soon break down as a result of discontinuity of interruption missions. If there are many frequent tasks, many CPU efforts will be spent on cost of interruptions so that system efficiency will be extremely slow. If query is applied instead, system efficiency will improve greatly. However, sometimes, query fails to meet the requirement of instantaneity, so the best method is to apply query in the process of interruption.

Mistake 4: Time sequence at memory interfaces doesn't need modifying.

Default value at memory interfaces is all determined by the most conservative parameters and in the practical application, it should be reasonably modified in accordance with bus operating frequency and waiting period. Sometimes, decrease of frequency can improve efficiency.

Mistake 5: More CPUs will help increasing processing capacity.

It is often said that two heads are better than one. For CPUs, it isn't usually true. The number of CPUs can't be determined until full understanding of the system takes place since coordination between CPUs may cost a lot.

Signal Integrity

Mistake 1: Over-believing in simulation data.

Simulation can never be the same as practical object and differences may occur among the same products even in the same batch. Moreover, simulation fails to take all possibilities into consideration, especially crosstalk. Therefore, simulation result can be only regarded as a reference.

Mistake 2: Digital signal edge should be as steep as possible.

The steeper the edge is, the wider the spectral range will be and the more energy in high-frequency part will be. Meanwhile, the more radiation high-frequency signals will produce and they will easily interfere with other signals with bad transmission quality on leads. Therefore, low-speed chips should be applied as many as possible.

Mistake 3: Decoupling capacitor should be as many as possible.

Generally speaking, the more decoupling capacitors there are, the more stable power will be. However, too many capacitors will also lead to some disadvantages such as a waste of cost, difficult routing and too large powering impulse current. The key to decoupling capacitance design lies in correct selection and placement.

Energy Consumption

Mistake 1: Neglecting energy consumption issue in the case of 220V supply

The purpose of low energy consumption design doesn't only lie in power saving, but also on decrease of cost of power module and heat dissipation system. It's obviously insufficient to consider power supply when dealing with energy consumption issues since energy consumption is mostly determined by amount of current and temperature of components.

Mistake 2: All bus signals should be pulled by resistors.

Sometimes, signals need to be pulled by resistors but not all. The current consumed when a pure is pulled up or down is just tens of microamps while the current consumed for pulling up or down of a driven signal reaches the level of milliamp. If all signals are pulled by resistors, more energy has to be consumed on resistors.

Mistake 3: Leaving unused I/O interfaces unused

Unused I/O interfaces on CPU and FPGA will possibly become input signals with repeating oscillations when they suffer from even a little interference from external environment. Moreover, energy consumption of MOS components basically depends on reversal times of gate circuit. Therefore, the best solution to it is to set those interfaces as output that mustn't be connected with signals with drivers.

Mistake 4: Without considering energy consumption of small chips

It's difficult to determine energy consumption of relatively simple chips inside system since energy consumption is generally determined by current on pins. For example, power consumption of ABT16244 is less than 1mA without load. However, each pin of it is capable of driving a load of 60mA, which means that the maximum energy consumption with full loads can reach 960mA. A huge difference of energy consumption takes place.

Mistake 5: Overshoot can be eliminated through excellent matching.

Overshoot exists on almost all signals except some special signals such as 100BASE-T or CML. Matching isn't necessary as long as it isn't so large. Extremely high requirements are aroused by matching. For example, output impedance of TTL is less than 50Ω, some even 20Ω and if such a large matching is implemented on it, current will become so large that energy consumption fails to accept it. Plus, signal amplitude will be so small that it can't be used again. BTW, output impedance isn't the same when ordinary signals output high level and low level and perfect matching can never be obtained as well. Therefore, matching between signals such as TTL, LVDS and 422 can be acceptable for overshoot, which is the best solution.

Mistake 6: Energy consumption issues are attributed to hardware only.

In a system, hardware is responsible for establishing a stage while software plays a significant role in the play. Each chip visit and reversals of each signal are nearly controlled by software. Implementation of suitable measures will contribute a lot to decrease of energy consumption.

Cost Saving

Mistake 1: Neglecting resistance accuracy of pull-up/pull-down resistors

Some engineers don't think resistance accuracy of pull-up/pull-down resistors matters. For example, they tend to pick randomly, 5K, since it is easy to calculate. As a matter of fact, however, resistance of 5K doesn't exist in component market and the closest is 4.99K (accuracy is 1%) and 5.1K (accuracy is 5%) whose costs are respectively four times and twice larger than that of 4.7K (accuracy is 20%). Nevertheless, resistors with resistance whose accuracy is 20% come only in the type of 1K, 1.5K, 2.2K, 3.3K, 4.7K and 6.8K. With 4.99K or 5.1K with accuracy of 1% compared with 4.7K with accuracy of 20%, the former is obviously cost-effective.

Mistake 2: Random selection of indicating light color

Some engineers pick up indicating light color based on their favor. However, technologies on indicating lights whose colors are red, green, yellow or orange have been developed for couples of years. Furthermore, their price is extremely low. In contrary, blue indicating lights receive relatively bad technology maturity and low supply reliability with price four to five times higher. Up to now, blue indicating lights are just applied in situations where other colors can never be replaced such as video signal indicating.

Mistake 3: Application of CPLD just for top grade

Some engineers apply CPLD instead of gate circuit of 74** just for top grade. However, it will result in both higher cost and numerous work for production and files.

Mistake 4: Striving for the fastest MEM, CPU and FPGA

Confronted with high system requirement, engineers just think all the chips have to be the fastest such as MEM, CPU and FPGA. As a matter of fact, in a high-speed system, not all parts are working at a high speed. Moreover, component working speed improvement leads to increasing of cost and great interferece to signal integrity.

Mistake 5: Just relying on automatic routing

For PCB design with low design requirement, some engineers just depend on automatic routing. Automatic routing tend to cause larger PCB area and through-hole vias that are multiple times more than appliecaiton of manual routing. Since line width and number of through-hole vias directly affect yield of PCB and driller consumption, cost is then greatly influenced. In order to get cost under control, it's better to make the best of manual routing.

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