History of High-Density Packaging Technology

As early as 1990s, electronic products have been developing towards portability, miniaturization, networking and multimedia all of which also bring forward corresponding requirement on electronics assembly technology:
• Information content improvement per unit volume, that is, high density;
• Processing speed improvement per unit time, that is, higher speed.


In order to meet the above requirement, function density of circuit assembly has to be improved, which becomes the essential element encouraging electronic component packaging technology to go further.


As package size shrinks, mutual connection efficiency thereafter goes up. Connection efficiency refers to the ratio between maximum size of chip and package size. At the beginning of 1990s, connection efficiency of PQFP (plastic quad flat package) can be at most 0.3. Then, connection ratio of CSP (chip scale package) is as high as 0.8 to 0.9. By now, connection ratio of the latest generation of package is higher than that of COB (chip on board), which is equivalent to that of FC (flip chip) package.


In the future, package technology will develop towards the following trends:
• Partial CSP will become standardized and mass produced;
• CSP industry will be established with some fundamental industries founded concerning material, assembly, test and on-board assembly etc.;
• FC package technology and corresponding basic industry will be further developed;
• WLCSP (wafer level chip scale package) will be developed with corresponding industries taking off.

Pins Stretching from Periphery to Array

Decades have witnessed constant development of component package technology that is compatible with the progress of ICs (integrated circuits). Any generation of ICs calls for a certain generation of packaging technology and the progress of SMT (surface mount technology) further pushes component packaging technology up to a new level. Medium and small scale ICs that were applied in 60s or 70s depended on TO (transistor outline) packages to a large extent and then DIP (dual in-line package) and PDIP (plastic dual in-line) were developed, later playing a leading role during that time.


With the advent of SMT in 1980s, IC packages preferred LCC (leadless ceramic carrier), PLCC (plastic leadless ceramic carrier) and SOP (small outline package) because they were more compatible with SMT calling for short leads or no leads. Then, QFP (quad flat package) after decades of research and development not only gets package issues owned by LSI package, but also goes smoothly with SMT assembly on PCB (printed circuit board). All the merits mentioned above about QFP leads it to be prominent in electronic products using SMT, which maintains even true until today. QFP leads perform like gull wings on four sides, containing many more I/O pins than SOP that includes gull-wing leads on only two sides. To be more compatible with further progress of electronic assembly density, lead spacing of QFP has developed from 1.27mm to 0.3mm, which further brings forward constantly improving I/O pin count and package volume. As a result, more difficulties are generated to electronic assembly, leading pass rate reduction and assembly cost improvement. In addition, due to limitations of manufacturing technologies of component lead frame manufacturing precision, 0.3mm has become the limit when it comes to QFP lead spacing, which dramatically stops assembly density from going up. Therefore, it can be forseen that the progress of QFP has come to an end. Thus, people start searching for other types of packages such as BGA (ball grid array). I/O pins of BGA packages are distributed under package in array as balls or columns. Furthermore, BGA packages feature large lead spacing and short leads, which is beneficial to the settlement of coplanarity and warpage issue deriving from leads in fine-pitch components. The advantages of BGA technology lie in its capability on I/O pin count and spacing increasing, which further deals with high cost and low reliability issue as a result of high I/O pin count owned by QFP technology.


The advent of BGA can be regarded as a breakthrough of packaging technology because it is not only capable of containing more I/O pins, but it can be designed to be in double layers or multiple layers to conform to functions of ICs as well. As a result, it is capable of making resistor optimized, placing two or more chips on the same base board for interconnection and then packaging in the same shell, which is MCM (multiple chip module). If FC technology is used, participation of metal wires isn't necessary for connection. Thus, it's beneficial to accelerate IC running speed and reduce complexity degree and power consumption.

Development of BGA

BGA is type of surface array package working perfectly for SMT. 1960s saw the research of BGA while its pragmatic application took off after the year of 1989. Since plastic package was developed by Motorola and Citizen in 1989, development and application of BGA has been greatly encouraged. In 1991, PBGA (plastic ball grid array) was developed with resin substrate applied, working agreeably on radio transmitter receiver and computer. In 1993, PBGA started being exposed on the market, ready for its pragmatic state. As early as 1995, BGA packages began to be widely applied. By now, PBGA components have been primarily applied in telecommunication products, remote telecommunication devices, computer system and work stations.


Among all the advantages of BGA package, the essential one lies in its application of array distribution of solder balls, making it feature large pitch between pins, which greatly increases assembly performance. Thus, BGA package can be developed and applied. Nevertheless, PBGA feature some issues as well. For example, plastic package tends to absorb humidity; base board tends to be warped; all types of BGA components are difficult for inspection and rework after soldering. All of the mentioned issues make BGA packages confronted with challenges concerning reliability once they are applied in extreme environment. However, those issues have been resolved to some extent. For example, CBGA (ceramic ball grid array) helps defeating humidity absorption issue; TBGA (tape ball grid array) can also defeat humidity absorption issue and has been regarded as a low-cost package with high number of I/O pins and high performance. Now that numerous types of BGA components have been developed with technical issues overcome, BGA began being widely applied as early as the year of 1998. QFP is first selected for applications with I/O pins whose number is lower than 200 while BGA is first selected for applications with I/O pins whose number is over 200.

Bonding of BGA and FC

Bonding of BGA package and FC technology brings forward the following advantages:
• I/O pin number can be very high (1,000 to 2,000) and advanced MCM calls for many I/O pins;
• Parasitic electrical parameters can be reduced and impedance and crosstalk can be reduced by 5 to 10 times;
• Metal wire soldering time can be shortened.
• Higher thermal dissipation performance;
• Smaller size.

CSP

Although the flourishing and development of BGA successfully solves the difficulties QFP have to face up with, BGA package still can't totally meet the requirement of electronic products towards miniaturization, multiple functions or higher reliability and can't further meet the requirement of packaging efficiency improvement or reaching intrinsic transmission rate. As a result, CSP comes onto the stage.


With an equivalent structure with BGA, the difference between CSP and BGA lies in its smaller solder ball diameter, finer pitch and thinness so that more I/O pins can be available within the same packaging area, that is, assembly density increases. In other words, CSP is a small version of BGA.


By now, the most prevalent CSP is WLCSP with the following merits: • Both wafer and WLCSP components can be manufactured in the same production line and production plan and production implementation can be optimized; • Silicon manufacturing technology and later packaging test can be carried out at the same place with automatic level of wafer manufacturing improved; • Test cost and investment cost can be reduced; • Logistics work can be optimized.

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Helpful Resources
SMT Packaging Technology Introduction
An Introduction of BGA Packaging Technology
A Brief Introduction of BGA Package Types
Factors Affecting the Quality of BGA Assembly
Comparison between Ultra Fine Pitch QFP and BGA and Their Development Trend

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