With constant development of information technology, electronic products are becoming increasingly complicated in terms of their functions, categories and structures, driving PCB design towards direction of multiple layers and high density. As a result, much attention has to be paid on EMC (Electromagnetic Compatibility) of PCB design since EMC design of PCB not only ensures normal and stable working of all the circuits on board so that they won't be mutually interfered with each other but also effectively decreases radiation transmission and conducted emission of PCB in order to stop circuits from being interfered by external radiation and conduction. Interference is the foremost enemy of EMC. But, engineers, you should stop worrying from this article on.
Classification of PCB Interference
PCB interference can be classified into three categories. The first category is layout interference that refers to the interference caused by unsuitable placement of components on PCB. The second category is stacking interference that refers to noise interference caused by unscientific setting. The third category is routing interference that refers to interference caused by improper setting of distance between PCB signal lines, power lines and grounding lines, line width or unscientific PCB routing method.
In terms of PCB interference classification, some suppression measures can be taken respectively from the perspective of layout rules, stacking strategy and routing rules with influence as a result of PCB interference reduced or even eliminated in order to ensure the compatibility with EMC design standard.
Corresponding Suppression Measures for PCB Interference Based on Its Classification
• Suppression measures for layout interference
The privilege to stop layout interference lies in reasonable PCB layout that should conform to the following six rules:
1). Circuit position of each function module should be reasonably set according to signal current location and their flowing directions should be maintained the same as much as possible.
2). Core component in the circuit of module should be set at the center and leads should be shortened as much as possible between components, especially high-frequency components.
3). Integration between thermo sensitive elements and chips should be carried out far away from heating elements.
4). Connector position should be determined in accordance with component positions on board. Connectors should be placed at one side of PCB in order to stop cables from being led out from two sides and to decrease common mode (CM) current radiation.
5). I/O driver should be tightly close to connector in order to stop long-distance routing of I/O signals on the board.
6). Thermo sensitive elements mustn't be placed too close to each other and input and output components should be far away from them as well.
• Suppression measures for stacking interference
First, PCB design information should be mastered with comprehensive elements considered including signal line density, power and grounding classification in order to determine power and number of layers that ensure implementation of circuit function. Quality of stacking strategy is essentially correlated with transient voltage of ground plane or power plane and electromagnetic shield of power and signals. Based on practical stacking design experience, stacking design should conform to the following rules:
1). Ground plane and power plane should be adjacent to each other and distance between them should be as small as possible.
2). Signal plane should be tightly close to ground plane or power plane. Either single layer or multiple layers is OK with it.
In the process of single-layer or double-layer PCB design, power lines and signal lines should be carefully designed. In order to reduce loop area of power current, grounding lines and power lines should be tightly close to each other and should maintain mutually parallel. For single-layer PCBs, protective grounding lines should be arranged at both sides of important signal lines. On one hand, it aims to shrink loop area of signals. On the other hand, crosstalk can be avoided between signal lines.
For double-layer PCBs, protective grounding lines can be set as well or massive-area grounding is implemented on the image plane of significant signals. Although PCB manufacturing and assembly debugging are simple and convenient, it's not acceptable to directly simulate complicated PCBs such as digital circuit and digital-analog circuit because radiation will increase with the increasing of loop area without reference plane.
Multi-layer PCBs are suggested if cost is sufficient. Three rules have to be followed in the process of multi-layer PCB design:
1). For significant signal lines, such as bus or clock lines with strong radiation and lines with high sensitivity, routing should be implemented between two ground planes or at the signal plane that is tightly close to ground plane, which is beneficial for signal loop area shrinking, radiation intensity reduction and anti-interference strengthening.
2). Edge radiation should be ensured to be under effective control. Compared with adjacent ground plane, power plane should be internally reduced by 5 to 20H (H refers to dielectric thickness).
3). If high-frequency signal lines exist between bottom layer and top layer, they should be arranged between top layer and ground plane in order to prohibit radiation of high-frequency signal lines to space.
• Suppression measures for routing interference
In order to prohibit interference, the following rules have to be obeyed in terms of routing:
1). Leads at output terminal and input terminal should avoid being parallel for a long distance. Parallel crosstalk can be decreased through adding grounding lines or increasing distance between lines.
2). Routing width can never be changed suddenly. Corner should be arc or with an angel degree of 135°.
3). External radiation of current-carrying loop increases (decreases) with the increasing (decreasing) of loop area, current and signal frequency, so it's necessary to reduce lead loop area when current is flowing through.
4). Lead length should be reduced while width be increased in order to decrease impedance of leads.
5). In order to minimize the noise coupling and crosstalk between adjacent lines, isolation processing should be carried out between lines to ensure routing isolation.
6). Shunt isolation key signal should be set and key signals are protected by protective circuits.
Moreover, in the routing process of signal lines, power lines and grounding lines, routing rules have to be followed in accordance with its own characteristics and functions:
a. Public grounding lines should be arranged at the edge of PCB with mesh or loop pattern; grounding lines should be as thick as possible and more copper foil should be applied in order to strengthen shield effect; analog grounding should be isolated with digital grounding and single-point parallel connection should be applied in low-frequency ground of analog ground. Multi-point series connection should be applied in high-frequency ground. In practical routing, series connection can be combined with parallel connection.
b. Width of power lines should be increased whenever possible and loop resistance should be reduced so as to ensure synchronization between direction of ground lines and power lines and that of data transmission. For multi-layer PCBs, distance between power lines and ground plane or power plane should be reduced. Power should be supplied to each function unit independently and circuits with power supplied by public power should be close to and compatible with each other.
c. Signal lines should be as short as possible so as to ensure the reduction of interference signal coupling path. Clock signal lines and sensitive signal lines should be routed first, next come high-speed signal lines and finally come insignificant signal lines. If signal lines are not compatible with each other, isolation processing should be implemented to stop the generation of coupling interference. Key signal routing can't surpass separation area or even reference plane space caused by pad and through-hole via. Otherwise, signal loop area will be increased. Meanwhile, in order to prohibit edge radiation, distance between key signal lines and reference plane can't be less than 3H (H refers to the height between key signal lines and reference plane).
The only thing we have to fear is fear itself. For electronic engineers, in the process of PCB design, maybe interference always lets you down. However, as long as we know where interference derives from and take effective measures, interference will definitely be reduced with PCB performance fully realized.